1. Field of the Invention
The present invention relates to a switching regulator and more particularly to a switching regulator having an excellent quick response to a deflection in output voltage despite a low current consumption.
2. Description of Related Art
The switching regulator disclosed in U.S. Pat. No. 6,127,815 aims at reducing a current consumption to be consumed in a control circuit in a suspending period in which no load current is consumed. In a switching regulator 200 shown in FIG. 5, a sleep signal outputted from a comparator 128 controls a switch 127. Further, a sleep signal is connected to a power saving enable terminal 223 of an error amplifier 222 so as to switch the control state of the error amplifier 222 between normal operating period and the suspending period which is a power saving operating condition.
In normal operating period for supplying a large load current, the switch 127 is connected to an A side with the sleep signal and the filter circuit 225 is connected to the output terminal of an error amplifier 222. The voltage of an output signal ITH is kept over a threshold voltage V1 and the sleep signal is kept on a low level so that the switching timing circuit 101 and comparator 102 are activated. Further, the error amplifier 222 is kept in activate condition capable of securing a sufficient quick response speed in the normal operating period.
In the suspending period, the load current is reduced and the voltage of the signal ITH drops below the threshold voltage V1, so that the sleep signal is inverted to a high level. The switching timing circuit 101 and the comparator 102 turn to inactive condition, and the error amplifier 222 not requiring the quick response turns to power saving operating condition. Further, the switch 127 is connected to B side, so that the filter circuit 225 is separated from the output terminal of the error amplifier 222. Consequently, power consumption is reduced.